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| (R) STV9936P/S 120-MHz On-Screen Display for Monitors with 4 True Independent Window Displays PDIP16 (Plastic Dual In line Package) ORDER CODE: STV9936P SO16 Narrow (Plastic Micropackage) ORDER CODE: STV9936S Main Features s Horizontal frequency up to 150 kHz s On-chip Pixel Clock Generator from 7.68 MHz to 120 MHz, without crystal oscillator s 16-pin Narrow SO or DIP packages s Programmable horizontal resolutions from 384 to 1524 dots per scan line s 4 independent windows all with character display s Overlapping windows with automatic control of display priorities and scrolling menu effects s Independent and programmable displays, positions and sizes for each window s Transparent or 8 programmable background colors for each window s Window size up to 16 rows of 32 characters s Each window has its own bordering or shadowing effects with programmable color, height and width s Each window can be separately erased s Programmable common positioning to easily control centered display s 256 standard and 16 multi-color characters or graphic fonts in ROM. Character fonts can be customized using a mask-programmable ROM q q q s Characters q Common character height and row space. Character height from 18 to 127 lines and space lines from 0 to 62 split above and below character rows 12 x 18 dot matrix per character Display of up to 704 characters Programmable shadow/border effects for characters in each separate window 32 programmable background, foreground, blinking character colors for each character (8 possibilities per window) 8 selectable colors for standard characters Transparent and 8 selectable colors for background Fade-in/Fade-out effects Possibility of full-screen display with a selectable color q q q s On-Screen Effects q q s IC interface for microcontrollers with slave address BA(h) in Read and Write modes September 2003 Version 3.3 1/48 STV9936P/S Table of Contents Chapter 1 1.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Description ................................................................................................................... 7 Chapter 2 2.1 Register Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 IC Protocol .......................................................................................................................... 8 2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.1.6 Data to Write ........................................................................................................................................8 Transmission Formats ..........................................................................................................................8 Format, Window and Row Address (FWR) ..........................................................................................9 Format, Attribute and Column Address (FAC) .....................................................................................9 Control Data, Color Codes or Character Codes (D) ..........................................................................10 Configuration of Transmission Formats ............................................................................................10 2.2 2.3 2.4 Format Changing ............................................................................................................... 10 Read Mode ......................................................................................................................... 11 Addressing Map ................................................................................................................. 11 Chapter 3 3.1 3.2 Window Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Enable Display ................................................................................................................... 13 Origin Positions for the 4 Windows .................................................................................... 13 3.2.1 3.2.2 General Horizontal Delay (HD) ..........................................................................................................13 General Vertical Delay (VD) ...............................................................................................................13 3.3 Window Positions in the Frame .......................................................................................... 14 3.3.1 3.3.2 Window Horizontal Delay ...................................................................................................................14 Window Vertical Delay .......................................................................................................................14 3.4 Window Size: Number of Character Rows and Character Columns .................................. 15 3.4.1 3.4.2 Window Horizontal Size .....................................................................................................................15 Window Vertical Size .........................................................................................................................15 3.5 3.6 Window Background Color ................................................................................................. 16 Window Bordering and Shadowing Effects ........................................................................ 16 3.6.1 3.6.2 3.6.3 3.6.4 Enable Bordering or Shadowing Effects ............................................................................................16 Bordering or Shadowing Selection ....................................................................................................16 Border or Shadow Color ....................................................................................................................17 Bordering or Shadowing Size ............................................................................................................17 3.7 Window Display Priority Management ............................................................................... 18 Chapter 4 4.1 4.2 4.3 Character Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 General Description ........................................................................................................... 19 Horizontal Resolution ........................................................................................................ 19 Character Height ............................................................................................................... 19 2/48 STV9936P/S 4.4 4.5 Row Height (Space Lines) ................................................................................................. 20 Character Colors ................................................................................................................ 21 4.5.1 4.5.2 4.5.3 Character Background Color .............................................................................................................21 Character Color .................................................................................................................................22 Character Blinking Effect ...................................................................................................................23 4.6 4.7 4.8 Multicolor Characters ......................................................................................................... 23 Character Shadowing ......................................................................................................... 23 Character Font ................................................................................................................... 25 Chapter 5 5.1 5.2 5.3 5.4 RAM Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Character Coding ............................................................................................................... 28 Window Memory Allocation ................................................................................................ 28 Memory Size Allocation ...................................................................................................... 28 Window Reset .................................................................................................................... 30 Chapter 6 Chapter 7 7.1 7.2 7.3 7.4 7.5 Pixel Clock Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 General OSD Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Enable OSD ....................................................................................................................... 32 Fade-in and Fade-out Effect .............................................................................................. 32 Full Screen Display ............................................................................................................ 32 Signal Polarity and Triggering ........................................................................................... 33 Reset .................................................................................................................................. 34 Chapter 8 8.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Register Specification ........................................................................................................ 35 Chapter 9 9.1 Application Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 Software Hints .................................................................................................................... 38 9.1.1 9.1.2 Programming Recommendations ......................................................................................................38 Examples of Programming .................................................................................................................38 9.2 Hardware Hints .................................................................................................................. 39 Chapter 10 Chapter 11 11.1 11.2 Application Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Electrical and Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 Absolute Maximum Ratings ............................................................................................... 42 Operating Conditions ......................................................................................................... 42 3/48 STV9936P/S 11.3 11.4 Electrical and Timing Characteristics ................................................................................. 42 IC Bus Characteristics ...................................................................................................... 43 Chapter 12 12.1 12.2 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 SO16 Narrow Plastic Micropackage .................................................................................. 44 Dual In-line Plastic Package ..............................................................................................45 Chapter 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 4/48 STV9936P/S General Description 1 General Description The STV9936 is a new On-Screen Display (OSD) device with multiple menu displays for monitor applications. In addition to the standard features of an OSD, the special features of the STV9936 are listed below: q Simultaneous display of up to 4 menus anywhere on the screen. Each of the 4 independent windows, all displaying characters, can be overlapped and display priorities are automatically controlled. Window sizes and positions are independently programmable as well as scrolling menu effects. Programming of the general OSD and of the 4 windows is controlled by an IC bus in Read and Write modes, to suit the various CRT displays. Associated with an easily programmable character height, the internal PLL generates the programmable pixel clock, without using a crystal oscillator, that defines the character width making the device suitable for multi-sync applications. A maximum of 704 characters, defined in the mask-programmable ROM, are distributed among the 4 windows and displayed simultaneously. Figure 1: Multi-window Concept with Character Display q q q The STV9936 introduces a new "Multi Windows" concept allowing you to display and program up to 4 color-boxes independently, with overlapping and priority management. 5/48 General Description Figure 2: STV9936 Block Diagram STV9936P/S SCL 2 SDA 1 POR Control Registers IC Sequencer & Protocol Analyzer Reset RAM Interface RP 15 PLL VCO 14 Clock ROM Address Generation HFLY 4 Sequencer and Control Display VS 3 Color Encoder RAM ROM TEST 7 Test STV9936 9 10 11 12 ROUT GOUT BOUT FBLK 6/48 STV9936P/S General Description 1.1 Pin Description Figure 3: Pin Connections SDA SCL VS HFLY DVDD DVSS TEST OVDD 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 AVSS RP VCO AVDD FBLK BOUT GOUT ROUT Table 1: Pin Descriptions N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name SDA SCL VS HFLY DVDD DVSS TEST OVDD ROUT GOUT BOUT FBLK AVDD VCO RP AVSS Direction I/O Input Input Input Input Output Output Output Output I/O I/O - Digital/ Analog Digital Digital Digital Digital Supply Supply Digital Supply Digital Digital Digital Digital Supply Analog Analog Supply Function Serial Data of IC bus Serial Clock of IC bus Vertical Synchronization Input Horizontal Synchronization Input Digital Power Supply Digital Ground Remains at 0 (for test purposes only) Digital Power Supply Red Color Output Green Color Output Blue Color Output Fast Blanking Output Analog Power Supply for VCO for VCO Analog Ground 7/48 Register Addressing STV9936P/S 2 Register Addressing All control registers are located in Window 0, Row 0. All color-box data is located in Window 0, Row 2. Three formats are available: A, B and C, as described in the IC protocol (see Section 2.1: IC Protocol on page 8). All addresses (FAC and FWR bytes) are based on Formats A or B, and are written in hexadecimal format. Data in Window 0, Row 1 is reserved. DO NOT write to this location. 2.1 IC Protocol The serial interface with the microcontroller is an IC bus with 2 wires: SCL and SDA.The OSD is a slave circuit with 2 modes: Write and Read. 2.1.1 Data to Write In the OSD, the IC bus is used to write - read: q q q the control data the character codes and their respective color codes the color-boxes (8 color-boxes per window). A color-box contains the character color, character background color and blink data. There are 8 color-boxes for each OSD window which are used to define the colors available for all the characters of the given OSD window. 3 bits are required to code the 8 color-boxes. These bits are the color code. For more information, refer to Section 4.5: Character Colors on page 21. Each character code is related to its own window, row and column. Consequently, the protocol of the IC transmission includes this information (window, row and column) to define the position of the character on the screen. These 3 pieces of information about the position are transmitted in 2 bytes. As each character on the screen has its own color code, the same protocol is used to write all the color codes and character codes. Only the bit called `A' allows you to distinguish the character codes from the color codes corresponding to 1 position on the screen. The control data is also written with the same protocol using windows, rows and columns. Window 0 is reserved for control data and color boxes. 2.1.2 Transmission Formats There are 3 transmission formats to suit the amount of data to update. The transmission format is coded in the "window/row/column" bytes. Format A is suitable for updating small amounts of data which are allocated to different window, row and column addresses. Format B is recommended for updating data for the same window and the same row address, but with a different column address and when changing the Character/Color-code attribute (bit A), or when writing to a different IC control register. 8/48 STV9936P/S Register Addressing Format C is appropriate for updating large amounts of data from a full window or full screen. The window, row and column addresses are incremented automatically when this format is applied. Data is written to fill all the allocation memory of the windows. The transmission formats are as follows: 1. Format A: S-FWR-FAC-D FWR-FAC-D FWR-FAC-D FWR-FAC-D...Stop 2. Format B: S-FWR-FAC-D FAC-D FAC-D FAC-D...Stop 3. Format C: S-FWR-FAC-D D D D...Stop Where: S = Slave address = BAh FWR = Format, Window and Row address FAC = Format, Attribute and Column address D = Control data, Color codes (3 bits) or Character codes (8 bits). In Format C, the order of automatic incrementation for data D is first the column value, then the row value, and then the window value. Table 2: Various Bytes coded in the IC Transmission Byte FWR FAC D: Control Data (in window 0 only) D: Color Code D: Character Code 0 0 0 Bit 7 1 0 Bit 6 Bit 5 W[2:0] Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 R[3:0] C[4:0] D[7:0] 0 D[7:0] 0 D[2:0] F A 2.1.3 Format, Window and Row Address (FWR) Bit 7 indicates the `Window & Row' byte when set to 1. W[2:0]: Window Number 000: Control Data and Color boxes 001: Window 1 010: Window 2 011: Window 3 100: Window 4 R[3:0]: Row Number from 0 to 15. Each window has a maximum number of 16 rows. 2.1.4 Format, Attribute and Column Address (FAC) Bit 7 indicates the `Attribute & Column' byte when set to 0. F: Format 0: Format A or B 1: Format C A: Transmission of character code or color code 0: Character Code 9/48 Register Addressing 1: Color Code STV9936P/S When reading or writing control data and/or color boxes, bit A must be set to 0. For Character codes, A must be set to 1. C[4:0]: Column Number There are 32 possible columns. 00000: 1 column 11111: 32 columns 2.1.5 Control Data, Color Codes or Character Codes (D) Color codes are stored on 3 bits. Control data and Character codes are stored on 8 bits. 2.1.6 Configuration of Transmission Formats Table 3: Configuration of Transmission Formats Byte Windows & Rows Format A, B or C A or B C A, B or C A or B C Bit 7 1 0 0 1 0 0 Bit 6 Bit 5 W[2:0] Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 FWR FAC FAC FWR FAC FAC R[3:0] C[4:0] C[4:0] R[3:0] C[4:0] C[4:0] Address bytes for Characters Codes Column (A and B) Column (C) Windows & Rows 0 1 0 0 W[2:0] Address bytes Column (A and B) for Color Codes Column (C) 0 1 1 1 All formats must start with the S, FWR and FAC bytes. All FAC values referred to in this datasheet correspond to transmission formats A or B. 2.2 Format Changing To change from Format A to Format B S-FWR[0]- FAC[0]-D[0] FWR[1]- FAC[1]- D[1] FWR[2]- FAC[2]- D[2] FAC[3]- D[3] FAC[4]D[4] FAC[5]- D[5]... The F bit from the FAC byte is always 0 in this case. To change from Format A to Format C S - FWR[0]- FAC[0]- D[0] FWR[1]- FAC[1]- D[1] FWR[2]- FAC[2]- D[2] D[3] D[4] D[5]... The "F" bit from the FAC byte is as follows: F[0] = F[1] = "0" F[2] = "1" To change from Format B to Format A S - FWR[0]- FAC[0]-D[0] FAC[1]- D[1] FAC[2]-D[2] FWR[3]- FAC[3]- D[3] FWR[4]- FAC[4]D[4]... 10/48 STV9936P/S The F bit from the FAC byte is always 0 in this case. Register Addressing To change from Format B to Format C S - FWR[0]- FAC[0]- D[0] FAC[1]- D[1] FAC[2]- D[2] D[3] D[4]... The "F" bit from the FAC byte is as follows: F[0] = F[1] = "0" and F[2] = "1" It is not possible to change from Format C back to Format A or B. Figure 4: Format Changing Sequences Start start Format A Format C Format B 2.3 Read Mode The transmission format is shown as below: Start - S(w) - FWR- FAC - Stop - Start - S(r) - D D D D...Stop Where: S(w) = Slave address in write mode = BAh = 10111010, S(r) = Slave address in read mode = BBh = 10111011. Registers and data in RAM are readable. This mode is useful when developing OSD applications. 2.4 Addressing Map Table 4: Window Addressing Map Window Row Row 0 Row 1 Row 2 Rows 0 to n (n = 15 max.) Column Columns 0 to 31 Columns 0 to 31 Columns 0 to 31 Columns 0 to m (m = 31 max.) Data Control Data (8 bits) Reserved (Do Not Write) Color-boxes (8 bits) Characters Coding (11 bits) Window 0 Window 0 Window 0 Windows 1, 2, 3 and 4 11/48 Window Specifications STV9936P/S 3 Window Specifications Four different independent windows with separate character displays can be simultaneously displayed on screen. It is possible to have overlapping windows with an automatic control of display priorities: downscale priorities from Window 4 to Window 1. Window 1 is well-adapted for the OSD general menu. The 4 windows, each with its own character display, can be positioned anywhere on the screen. The following characteristics are defined for each window: q q q q q Enable Display Position Size, adjustable with memory allocation Background Color Bordering or Shadowing effects with programmable color, height and width. Figure 5: Example of Window Displays Screen Axis Origin VD HD Window 2 Window 1 Window 3 Window 4 12/48 STV9936P/S Window Specifications 3.1 Enable Display The Enable Display command for each window is selected by bits ENW1, ENW2, ENW3 and ENW4. If the ENWi bit is set to 1, the corresponding window is displayed. Table 5: Enable Display FWR 80h FAC 07h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 ENW4 Bit 2 ENW3 Bit 1 ENW2 Bit 0 ENW1 3.2 Origin Positions for the 4 Windows The 4 windows are arranged in a vertical frame whose origin coordinates are the horizontal delay (HD) and the vertical delay (VD) located at the upper left-hand corner of the monitor screen. When the HD and VD values are changed, the 4 windows within the frame position are automatically shifted by the same value. The origin (HD, VD) can be programmed anywhere on the screen. Adjusting the origin position is used to globally reposition the OSD windows. The advantages of this system are easier programming, the possibility to adapt the position of all windows at a single time without changing the relative position of each window and the possibility for the user to program all 4 window positions. 3.2.1 General Horizontal Delay (HD) Table 6: Origin of Windows on Horizontal Axis: Horizontal Delay FWR 80h FAC 04h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 HD[6:0] Bit 2 Bit 1 Bit 0 The general horizontal delay defines the horizontal position of the origin coordinate for all four OSD windows. The horizontal delay is selected by bits HD[6:0]. A general horizontal offset is also applied: General Horizontal Offset = 50 pixels - Phase Error Detection Pulse Width (in pixels) The range of the horizontal delay is from 50 to 812 pixels, in steps of 6 pixels each. General Horizontal Delay = HD[6:0] x 6 pixels + General Offset (in pixels) The default value is 0h (left-hand side of the monitor screen). 3.2.2 General Vertical Delay (VD) Table 7: Origin of Windows on Vertical Axis: Vertical Delay FWR 80h FAC 05h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 VD[7:0] The general vertical delay defines the vertical position of the origin coordinate for all four OSD windows. The vertical delay is selected by bits VD[7:0]. A general vertical offset of 2 scan lines is also applied. 13/48 Window Specifications STV9936P/S The range of the vertical delay is from 2 to 1022 scan lines, in steps of 4 scan lines each. General Vertical Delay = VD[7:0] x 4 + 2 The default value is 0h (top of screen). 3.3 Window Positions in the Frame All values are referenced to the origin coordinates (HD, VD). For more information, refer to Figure 5 on page 12. 3.3.1 Window Horizontal Delay The window horizontal delay defines the horizontal start position for each separate OSD window. This value is selected by bits HDW1[6:0], HDW2[6:0], HDW3[6:0] and HDW4[6:0], respectively. Table 8: Window Horizontal Delay FWR 80h FAC 0Ch, 11h, 16h, 1Bh Default 0h, 20h, 0h, 10h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 HDWi[6:0] Bit 2 Bit 1 Bit 0 The range of the window horizontal delay is from 0 to 1524 pixels, in steps of 12 pixels each. Window Horizontal Delay = HDWi[6:0] x 12 pixels The total horizontal delay of a window is: General Horizontal Delay + HDWi[6:0] x 12 pixels; or, HD[6:0] x 6 pixels + HDWi[6:0] x 12 pixels + (50 pixels - Phase Error Detection Pulse Width). The default values for the window horizontal delay for each of the four OSD windows is given in Table 8. 3.3.2 Window Vertical Delay The window vertical delay defines the vertical start position for each separate OSD window. This value is selected by bits VDW1[5:0], VDW2[5:0], VDW3[5:0] and VDW4[5:0], respectively. Table 9: Window Vertical Delay FWR 80h FAC 0Dh, 12h, 17h, 1Ch Default 0h, 0h, Ch, Ch Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 VDWi[5:0] The range of the window vertical delay is from 0 to 63 rows of characters, in steps of 1 character row each. It is important to note that the height of each character row is defined by the row height parameter. For more information, refer to Section 4.4: Row Height (Space Lines) on page 20. Window Vertical Delay = VDWi[5:0] x Row_Height The total vertical delay of a window is: General Vertical Delay + VDWi[5:0] x Row_Height (in scan lines); or, (VD[7:0] x 4 + 2) + VDWi[5:0] x Row_Height (in scan lines). 14/48 STV9936P/S Window Specifications The default values for the window vertical delay for each of the four OSD windows is given in Table 9. 3.4 3.4.1 Window Size: Number of Character Rows and Character Columns Window Horizontal Size The window horizontal size defines the number of characters displayed for character row for each separate OSD window. This value is selected by bits HSW1[4:0], HSW2[4:0], HSW3[4:0] and HSW4[4:0], respectively. Table 10: Window Horizontal Size FWR 80h FAC 0Eh, 13h, 18h, 1Dh Default 19h, 9h, Fh, Fh Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 HSWi[4:0] Bit 1 Bit 0 The range of the window horizontal size is from 1 to 32 characters, in steps of 1 character each. Each character is 12 pixels long. There is an offset of 1 character. Window Horizontal Size = HSWi[4:0] +1 characters The default values for the window horizontal size for each of the four OSD windows is given in Table 10. 3.4.2 Window Vertical Size The window vertical size defines the number of character rows displayed for each separate OSD window. This value is selected by bits VSW1[3:0], VSW2[3:0], VSW3[3:0] and VSW4[3:0], respectively. Table 11: Window Vertical Size FWR 80h FAC 0Fh, 14h, 19h, 1Eh Default Bh, 4h, 7h, 7h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 VSWi[3:0] The range of the window vertical size is from 1 to 16 character rows, in steps of 1 character row each. It is important to note that the height of each character row is defined by the row height parameter. For more information, refer to Section 4.4: Row Height (Space Lines) on page 20. There is an offset of 1 character row. Window Vertical Size = (VSWi[3:0] + 1) x Row_Height (in scan lines) Row_Height = Character_Height + 2 x Space_Lines The default values for the window vertical size for each of the four OSD windows is given in Table 11. 15/48 Window Specifications STV9936P/S Table 12 shows an example of the origin and size of windows based on the example shown in Figure 5, Table 12: Example of Origin and Size of Windows Window i Window 1 Window 2 Window 3 Window 4 HD 0 5 6 3 VD 2 0 4 7 HSWi 7 4 6 4 VSWi 4 5 3 4 3.5 Window Background Color The window background color for each separate OSD window is coded over 4 bits as shown in Table 13. The first bit (Ti) specifies whether the background is transparent or if a color is displayed. If the background is transparent (Ti = 1), the active video is displayed as background. If a color is displayed (Ti = 0), the background color for each separate OSD window is coded over the last three bits (RWi, GWi and BWi, respectively). Windows are displayed with a white background by default (7h). Table 13: Background Color of Each Window FWR 80h FAC 10h, 15h 1Ah, 1Fh Default 7h, 7h, 7h, 7h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Ti Bit 2 RWi Bit 1 GWi Bit 0 BWi 3.6 3.6.1 Window Bordering and Shadowing Effects Enable Bordering or Shadowing Effects Bordering or shadowing effects are enabled for each separate OSD window by bits ENBS1, ENBS2, ENBS3 and ENBS4, respectively. 3.6.2 Bordering or Shadowing Selection Either the bordering or the shadowing effect is selected for each separate OSD window by bits BSW1, BSW2, BSW3 and BSW4, respectively. Table 14: Bordering and Shadowing Parameter Selection Bit ENBSi BSWi Description 0: No Bordering, No Shadowing (Default Value) 1: Bordering or Shadowing is selected. 0: Bordering is selected (Default Value) 1: Shadowing is selected. 16/48 STV9936P/S Table 15: Enable Bordering or Shadowing Effects FWR 80h 80h Window Specifications FAC 07h 10h, 15h 1Ah, 1Fh Default 0h 0h, 0h, 0h, 0h Bit 7 ENBS4 Bit 6 ENBS3 Bit 5 ENBS2 Bit 4 ENBS1 BSWi Bit 3 Bit 2 Bit 1 Bit 0 3.6.3 Border or Shadow Color The border or shadow color is separately programmable for each separate OSD window. This value is selected by bits WSRi, WSGi and WSBi for each of the four OSD windows. The value for each color is shown in Table 17. Table 16: Border or Shadow Color FWR 80h FAC 10h, 15h 1Ah, 1Fh Default 0h, 0h, 0h, 0h Bit 7 WSRI Bit 6 WSGI Bit 5 WSBI Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Table 17: Bordering and Shadowing Color Selection (WSRGBi) Value 000 001 010 011 Color Black (Default) Blue Green Cyan Value 100 101 110 111 Color Red Magenta Yellow White 3.6.4 Bordering or Shadowing Size The size of the bordering or shadowing width is separately programmable for each separate OSD window. This value is selected by bits BSWWi[2:0] for each of the four OSD window. The width size is from 0 to 14 pixels, in steps of 2 pixels each. Width Size = BSWWi[2:0] x 2 pixels The size of the bordering or shadowing height is selected by bits BSHWi[3:0] for each of the four windows. The height size is from 0 to 30 lines, in steps of 2 scan lines each. Height Size = BSHWi[3:0] x 2 scan lines. Table 18: Bordering or Shadowing Size FWR 80h 80h FAC 0Eh, 13h 18h, 1Dh 0Fh, 14h 19h, 1Eh Default 0h, 0h, 0h, 0h 0h, 0h, 0h, 0h Bit 7 Bit 6 BSWWi[2:0] Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 BSHWi[3:0] 17/48 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 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00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 VD Window 1 Window 4 Window 2 Window 3 18/48 3.7 Window Specifications Window Display Priority Management This order of priority is shown the example given in Figure 7. The OSD windows are displayed with the following priority: Window 4 (top), 3, 2 and 1 (bottom). Axis Origin Window Bordering Figure 6: Illustration of Window Bordering and Shadowing Effects HD Figure 7: Example of Window Displays M pixels N scan lines N scan lines M pixels Window Shadowing Screen STV9936P/S STV9936P/S Character Specifications 4 4.1 Character Specifications General Description There are: q q q q 256 monochrome characters and 16 multi-color characters in ROM 32 to 127 characters per line character height varies between 18 and 127 scan lines 0 to 62 scan space lines between character rows, with the same number of lines above and below the rows of characters. blinking effect for each character shadowing effect for characters in each window background and foreground character colors: for each character, among a Color-shop of 8 Color-boxes per window. There is a Color-shop for each window. The Color-boxes define the background colors and the foreground character colors and blinking effect. With the possibility to select: q q q 4.2 Horizontal Resolution Table 19: Horizontal Resolution FWR 80h FAC 01h Default 20h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 HR[6:0] Bit 2 Bit 1 Bit 0 The horizontal resolution defines the number of pixels per line expressed in characters unit. This value is selected by bits HR[6:0]. The range of the horizontal resolution is from 32 to 127 characters, in steps of one character. The default value is 32 characters per line (20h). If bits HR[6:0] are programmed with a value less than 32, the horizontal resolution will be 32 characters per line (minimum value). HR[6:0] = Number of characters per line It is important that the maximum pixel frequency must be respected (fPIXEL = 120 MHz maximum). As each character is 12 pixels long, the number of pixels per line varies from 384 to 1524. For more information, refer to Section 6: Pixel Clock Generator on page 31. 4.3 Character Height Table 20: Vertical Character Height FWR 80h FAC 02h Default 12h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 CH[6:0] Bit 2 Bit 1 Bit 0 The vertical height defines the number of scan lines used to display the characters. This value is selected by bits CH[6:0]. 19/48 Character Specifications The range of the vertical height is from 18 to 127 lines. CH[6:0] = Number of scan lines used to display the characters STV9936P/S The characters stored in ROM are coded on 18 lines. If bits CH[6:0] are programmed with a value less than 18, the characters will be automatically displayed with a height of 18 scan lines (minimum value). When a multiple of 18 scan lines are displayed, all ROM lines are repeated N number of times, with N in the range of 1 to 7, so as not to exceed the display of 127 scan lines. For example, if CH[6:0] = 36, each ROM line is repeated twice. If the number of scan lines displayed is not a multiple of 18, certain ROM lines are repeated more often than others, as shown in Table 21. For example, if CH[6:0] = 40, each ROM line is repeated twice and ROM lines 3, 7, 10 and 14 are repeated three times. Table 21 shows which ROM lines, from 0 to 17, are repeated depending on the CH[6:0] value. Table 21: Repeated ROM Lines1 CH Value 18, 36, 54, 72, 90, 108, 126 19, 37, 55, 73, 91, 109, 127 20, 38, 56, 74, 92 ,110, 21, 39, 57, 75, 93, 111 22, 40, 58, 76, 94, 112 23, 41, 59, 77, 95, 113 24, 42, 60, 78, 96, 114 25, 43, 61, 79, 97, 115 26, 44, 62, 80, 98, 116 27, 45, 63, 81, 99, 117 28, 46 ,64, 82, 100, 118 29, 47, 65, 83, 101, 119 30, 48, 66, 84, 102, 120 31, 49, 67, 85, 103, 121 32, 50, 68, 86, 104, 122 33, 51, 69, 87, 105, 123 34, 52, 70, 88, 106, 124 35, 53, 71, 89, 107, 125 A 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R 1. `R' = Repeated ROM lines `A' = Number of additional repeated lines 4.4 Row Height (Space Lines) The row height defines the number of scan lines above and below each character row. This value is selected by bits RSPA[4:0]. The total row height is defined as follows: Row_Height = Character_Height + 2 x Space_Lines (see Figure 8) 20/48 STV9936P/S Character Specifications The range of spacing lines for the row height is from 0 to 31 scan lines, in steps of one scan line each. Accordingly, the number of scan lines between each character row is multiplied by two; the bottom space line of a given character row being added to the top space line of the following character row. The default value is 0 scan lines. The space lines are displayed in the color of the associated character background. Table 22: Row Height (Space Lines) FWR 80h FAC 03h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 RSPA[4:0] Bit 1 Bit 0 Figure 8: Row Height Definition RSPA[4:0] Space Lines Total Row Height AB CH[6:0] Character Height RSPA[4:0] Space Lines 4.5 Character Colors The colors for the characters, character background and blinking effect are separately programmable for each OSD window. The color values are stored in a color-shop of 8 color-boxes for each window. There are 4 color-shops, 1 per window, offering the user 32 possibilities of character coloring. As the color-boxes are in RAM, the user must write to the color-box prior to using it. Color-box data is stored in Window 0, Row 2. For more information, refer to Section 2.4: Addressing Map on page 11. Table 23: color-box FWR 82h FAC 00h to 1Fh Default Bit 7 BC Bit 6 BR Bit 5 BG Bit 4 BB Bit 3 BLINK Bit 2 FR Bit 1 FG Bit 0 FB 4.5.1 Character Background Color A character background color can be separately programmed for each of the four color-boxes. This value is selected by bits BC, BR, BG and BB. Bit BC is used to define if a specific character background color will be displayed or if the character background color is the color of the window background. 21/48 Character Specifications STV9936P/S If a specific character background color is selected in a color box, the character background color is selected by bits BR, BG and BB. Table 24: Character Background Color Color Black Blue Green Cyan Red Magenta Yellow White Window Background Color 1 BC 1 1 1 1 1 1 1 1 0 BR 0 0 0 0 1 1 1 1 BG 0 0 1 1 0 0 1 1 BB 0 1 0 1 0 1 0 1 1. See Table 25 . Table 25: Background Color Priority BC 1 0 0 TI X 0 1 Background Color Character Background Color (BR, BG and BB) Window Background Color (RGBWi) Transparent Background (Video active) 4.5.2 Character Color A character color can be separately programmed for each of the color-boxes. This value is selected by bits FR, FG and FB. Table 26: Character Colors Color Black Blue Green Cyan Red Magenta Yellow White FR 0 0 0 0 1 1 1 1 FG 0 0 1 1 0 0 1 1 FB 0 1 0 1 0 1 0 1 22/48 STV9936P/S 4.5.3 Character Blinking Effect Character Specifications A character blinking effect can be programmed for each of the color boxes. This value is selected by the BLINK bit. When this bit is set to 1, the blinking effect is enabled and the characters blink. 4.6 Multicolor Characters 16 multicolor characters can be separately programmed for each of the color-boxes. These special characters are stored in the character font (see Figure 10) and are selected by bits MCOLOR[3:0]. MCOLOR[3] for Window 4 MCOLOR[2] for Window 3 MCOLOR[1] for Window 2 MCOLOR[0] for Window 1 If the MCOLOR bit is set to 0 for a specific color-box, the 256 monochrome ROM characters from $00 to $FF are available (default value). If the MCOLOR bit is set to 1, the 240 monochrome ROM characters from $00 to $EF and the 16 multicolor characters from $F0 to $FF are available. No shadowing effects on multicolor characters. No background effects on multicolor characters. Blinking on multicolor characters: background color coded in the associated color-box. Table 27: Multicolor Characters FWR 80h FAC 08h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MCOLOR[3:0] 4.7 Character Shadowing A character shadowing effect can be separately programmed for each of the four color-boxes. This value is selected by bits CSHA[3:0], respectively. The shadowing color is black. When this bit is set to 1, the characters of the corresponding OSD window are displayed with a shadowing effect, as shown in Figure 9. The default value is 0 (no shadowing effect). Figure 9: Character Shadowing 23/48 Character Specifications Table 28: Character Shadowing FWR 80h STV9936P/S FAC 08h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CSHA[3:0] 24/48 STV9936P/S Character Specifications 4.8 Character Font Figure 10 shows the available character font stored in ROM. For more information concerning the display of mono- or multi-color characters, refer to Section 4.6: Multicolor Characters. Figure 10: /AA Character Fonts 25/48 Character Specifications Figure 11: /AB Character Fonts STV9936P/S 0 0 1 2 3 4 5 6 7 8 9 A B C D E Mono F Multi F 1 2 3 4 5 6 7 8 9 ABCD E F 26/48 STV9936P/S Figure 12: /AC Character Fonts Character Specifications 27/48 RAM Specification STV9936P/S 5 5.1 RAM Specification Character Coding Each character to display is coded with 11 bits in the RAM with the following addressing method: q q Character Code: Bits RC[7:0] are used to address the ROM Code Color Code: Bits CB[2:0] are used to select 1 of the 8 color-boxes in the color shop of the corresponding OSD window. Table 29: Character Coding FWR FAC Bit 10 Bit 9 CB[2:0] Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 See Table 3 RC[7:0] 5.2 Window Memory Allocation The 4 OSD windows can be distributed differently. But the displayable windows will always contain a total of 22 blocks (1 block consists of 32 characters). Figure 13: Window Memory Space 1 Block Window 0 Color-boxes 10 Blocks Window 1 4 Blocks Window 2 Displayable Windows 4 Blocks Window 3 Window 4 4 Blocks 5.3 Memory Size Allocation The total number of characters or spaces is up to 704 with a maximum window size of 16 rows of 32 characters. The character codes of each window are allocated to a specific memory space. This memory space is programmable for each window. The window size must be less than or equal to its memory allocation. Any window size can be modified within its specific memory space, the other windows are not affected by this operation. 28/48 STV9936P/S RAM Specification The user must reserve a memory space for the largest window. According to the example shown in Figure 5, the total number of characters/spaces are: Table 30: Window Sizes Window Window 1 Window 2 Window 3 Window 4 Total Size 28 20 18 16 82 For example, to change the size of Window 3 from 3 rows of 6 characters to 5 rows of 4 characters, the resulting size is 20 characters. The number of rows increases and the number of characters per row decreases. The required memory is at least 20 characters. Note: A space is considered as being a character. The memory allocation is made by blocks of 32 characters. The maximum size of a window is 16 rows of 32 characters, or 512 characters. This corresponds to 16 blocks of 32 characters. 1 block is reserved for the color-boxes (see Chapter 4: Character Specifications on page 19), leaving 22 blocks of 32 characters for character codes (704 characters maximum). The RAM allocation for each window is coded in bits ALWi[3:0]. Window 4 memory allocation uses the remaining memory space. Table 31: Window RAM Allocation FWR 80h 80h FAC 09h 0Ah Default 39h 3h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ALW2[3:0] ALW1[3:0] ALW3[3:0] The number of memory blocks allocated for window "i" is (ALWi +1), the range of allocation is 1 to 16 blocks of 32 characters. The total number of blocks is 22. Note: If the user changes only 1 window allocation, the RAM addresses of the following windows change. Consequently we advise you to write the allocation when the windows are not displayed to avoid false images. 29/48 RAM Specification The default window RAM allocations are listed in Table 32. Table 32: Window RAM Default Values ALWi ALW1 ALW2 ALW3 STV9936P/S Default 9h 3h 3h Description 320 Characters (10 blocks) 128 Characters (4 blocks) 128 Characters (4 blocks) Window 1: 10 blocks of 32 words = 320 characters (ALW1 = 9). Window 2: 4 blocks of 32 words = 128 characters (ALW2 = 3). Window 3: 4 blocks of 32 words = 128 characters (ALW3 = 3). Window 4: the remaining RAM (4 blocks = 128 characters). 5.4 Window Reset All the RAM data from one of the four OSD windows can be reset by writing to bits RESETW[3:0]. When the RESETW bit is set to 1,all the RAM data in the allocation memory space of the corresponding OSD window is reset. These bits are automatically cleared when the RAM allocation reset is finished. All programmable registers are in Row 0 (Column i, Row 0). Table 33: RAM Allocation Enable and Reset FWR 80h FAC 0Bh Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RESETW[3:0] 30/48 STV9936P/S Pixel Clock Generator 6 Pixel Clock Generator The Pixel Clock Generator is used to synchronize the display clock with the horizontal flyback (HFLY) signal. This generator is based on a PLL function used to perform correct jitter. The pixel frequency is defined with the horizontal line frequency and the horizontal resolution. Pixel Frequency (fPIXEL) = 12 x HR[6:0] x fHLINE The VCO[1:0] value is used to select the appropriate curve partition of the VCO. Table 34: VCO Curve Partition VCO Value (Binary) 00 01 10 11 VCO Curve Partition 7.68 MHz < HPIXEL < 15 MHz (Default Value) 15 MHz < HPIXEL < 30 MHz 30 MHz < HPIXEL < 60 MHz 60 MHz < HPIXEL < 120 MHz Table 35: VCO Range FWR 80h FAC 00h Default 0h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 VCO[1:0] 31/48 General OSD Programming STV9936P/S 7 7.1 General OSD Programming Enable OSD The OSD window displays are enabled by the ENOSD bit. ENOSD = 1: OSD window displays are active. ENOSD = 0: OSD window displays are inactive. Pin FBLK = 0 and pins ROUT, GOUT and BOUT pins = 0 (bit RGBPOL is 0). The default value is 0. Table 36: Enable OSD FWR 80h FAC 00h Bit 7 Bit 6 Bit 5 Bit 4 ENOSD Bit 3 Bit 2 Bit 1 Bit 0 7.2 Fade-in and Fade-out Effect The Fade-in and Fade-out effect is used to progressively increase/decrease the OSD window to/ from its full size in just a few milliseconds. This effect is enabled by the FADE bit. FADE = 1: Fade effect is active FADE = 0: Fade effect is inactive (default value) Table 37: Fade FWR 80h FAC 00h Bit 7 Bit 6 Bit 5 FADE Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 7.3 Full Screen Display The STV9936 allows a full screen display with a selectable color programmable by the FBK bit as follows: FBK = 1: The video area is replaced by the color coded in bits FSR, FSG and FSB (full screen color values). Pin FBLK is always 1. FBK = 0: Normal video mode whether or not the OSD menu is displayed. The default value of bit FBK is 0. Table 38: Full Screen Registers FWR 80h 80h FAC 01h 03h Default 0h 0h Bit 7 FBK FSR Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 FSG FSB Table 39: Full Screen Colors Color Black (Default Value) Blue Green FSR 0 0 0 FSG 0 0 1 FSB 0 1 0 32/48 STV9936P/S Table 39: Full Screen Colors (Continued) Color Cyan Red Magenta Yellow White General OSD Programming FSR 0 1 1 1 1 FSG 1 0 0 1 1 FSB 1 0 1 0 1 7.4 Signal Polarity and Triggering Table 40: Signal Polarity FWR 80 FAC 00 Default Bit 7 FBKPOL Bit 6 RGBPOL Bit 5 Bit 4 Bit 3 VSP Bit 2 HSP Bit 1 Bit 0 Vertical Sync Triggering (VS input) The active edge of the VS pin used for vertical synchronization is selected by bit VSP. VSP = 0: The falling edge is active. (Default Value) VSP = 1: The rising edge is active. Horizontal Sync Triggering (HFLY input) The active edge of the HFLY pin used for horizontal synchronization is selected by bit HSP. HSP = 0: The falling edge is active. (Default Value) HSP = 1: The rising edge is active. RGB Output Polarity (ROUT, GOUT and BOUT outputs) The output polarity of pins ROUT, GOUT and BOUT is selected by bit RGBPOL. RGBPOL = 0: RGB active at 1 (Default Value) RGBPOL = 1: RGB active at 0 Table 41: RGB Output Control ENOSD Bit 1 1 0 0 RGBPOL Bit 0 1 0 1 RGB Outputs Active at 1 Active at 0 000 111 Display OSD OSD Video Video 33/48 General OSD Programming Fast Blanking Output Polarity (FBLK output) STV9936P/S The output polarity of the FBLK pin is selected by bit FBLKPOL. The default value is 0. Table 42: Fast Blanking Output Polarity Selection FBLKPOL 0 1 Description When OSD display, FBLK = 1 When active video, FBLK = 0 When OSD display, FBLK = 0 When active video, FBLK = 1 Table 43: FBLK Output Control ENOSD Bit 1 1 1 1 1 1 0 0 FBLKPOL Bit 0 0 0 1 1 1 0 1 FBK Bit 0 0 1 0 0 1 x x FBLK Output 0 1 1 0 1 0 0 1 Display Video OSD OSD OSD Video OSD Video Video Default Value Full Screen FBLK Inverted Full Screen No OSD No OSD 7.5 Reset Power On Reset The digital core and the PLL are asynchronously reset at Power On. Soft Reset A soft reset is enabled by the RST bit. RST = 1: The digital core is reset. All control registers, except PLL registers, are reset at the same value as at power on reset. It is not necessary to write RST = 0 to stop the reset. This bit is automatically cleared. PLL Register Reset The Pixel Clock Generator (VCO[1:0]) and Horizontal Resolution (HR[6:0]) bits are reset by the RST_PLL bit. RST_PLL = 1: HR[6:0] and VCO[1:0] are reset to the same value as the power-on reset. It is not necessary to write RST_PLL = 0 to stop the reset. This bit is automatically cleared. Table 44: Reset FWR 80h FAC 06h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RST_PLL Bit 0 RST 34/48 STV9936P/S Registers 8 8.1 Registers Register Specification Control registers are located at address in Window 0, Row 0. Color-boxes are located at addresses in Window 0, Row 2. See Section 4.5 on page 21. Character codes are located at addresses in Windows 1 to 4, as described in Section 5.1 on page 28. Table 45: Non-Displayable Window Register Mapping Register Control Registers Reserved Color-box Registers Window 0 0 0 Row 0 1 2 FWR Code 80h DO NOT WRITE 82h 35/48 Registers STV9936P/S Table 46: Control Registers: Window 0, Row = 0 FWR FAC Col Default 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ah Bh Ch Dh Eh Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 0h 20h 12h 0h 0h 0h 0h 0h 0h 39h 2h 0h 0h 0h 19h Bh 7h 20h 0h 9h 4h 7h 0h Ch Fh 7h 7h 10h Ch Fh 7h 7h BSWW4[2:0] = 000 BSHW4[3:0] = 0000 WS RGB 4 = 000 : black BSW4=0 BSWW3[2:0] = 000 BSHW3[3:0] = 0000 WS RGB 3 = 000 : black BSW3=0 BSWW2[2:0] = 000 BSHW2[3:0] = 0000 WS RGB 2 = 000 : black BSW2=0 BSWW1[2:0] = 000 BSHW1[3:0] = 0000 WS RGB 1 = 000 : black BSW1=0 HDW1[6:0] = 0 VDW1[5:0] = 0 HSW1[4:0] = 25 (26 characters) VSW1[3:0] = 11 (12 rows of characters) T1 = 0 HDW2[6:0] = 32 VDW2[5:0] = 0 HSW2[4:0] = 9 (10 characters) VSW2[3:0] =4 (5 rows of characters) T2 = 0 HDW3[6:0] = 0 VDW3[5:0] =12 HSW3[4:0] = 15 (16 characters) VSW3[3:0] = 7 (8 rows of characters) T3 = 0 HDW4[6:0] = 16 VDW4[5:0] = 12 HSW4[4:0] = 15 (16 characters) VSW4[3:0] = 7 (8 rows of characters) T4 = 0 RGB W4 = 111:white RGB W3 = 111:white RGB W2 = 111:white RGB W1 = 111:white ENBS4/3/2/1 = 0000 MCOLOR4/3/2/1 = 0000 ALW2[3:0] = 3 (4 blocks = 128 characters) full screen RGB = FS RGB = 000 Bit 7 Bit 6 Bit 5 Bit 4 ENOSD = 0 Bit 3 VSP = 0 Bit 2 HSP = 0 Bit 1 Bit 0 FBKPOL = 0 RGBPOL = 0 FADE = 0 FBK = 0 VCO[1:0] = 00 HR[6:0] :Horizontal Resolution = 32 characters CH[6:0] = Character Height = 18 RSPA[4:0] = Row Spacing = 0 HD[6:0] = Horizontal Delay Reference = 0 (50 pixels) VD[7:0] = Vertical Delay Reference = 0 (2 lines) RST_PLL = 0 ENW4/3/2/1 = 0000 CSHA4/3/2/1 = 0000 ALW1[3:0] = 9 (10 blocks = 320 characters) ALW3[3:0] = 3 (4 blocks = 128 characters) RESETW4/3/2/1 = 0000 RST = 0 36/48 STV9936P/S Table 47: Color Registers: Window 0, Row = 2 FWR 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h 82h Registers FAC 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh Col 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ah Bh Ch Dh Eh Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh Bit 7 WINDOW1 WINDOW1 WINDOW1 WINDOW1 WINDOW1 WINDOW1 WINDOW1 WINDOW1 WINDOW2 WINDOW2 WINDOW2 WINDOW2 WINDOW2 WINDOW2 WINDOW2 WINDOW2 WINDOW3 WINDOW3 WINDOW3 WINDOW3 WINDOW3 WINDOW3 WINDOW3 WINDOW3 WINDOW4 WINDOW4 WINDOW4 WINDOW4 WINDOW4 WINDOW4 WINDOW4 WINDOW4 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Color-box 1: BC- BR-BG-BB-blink-FR-FG-FB Color-box 2: BC- BR-BG-BB-blink-FR-FG-FB Color-box 3: BC- BR-BG-BB-blink-FR-FG-FB Color-box 4: BC- BR-BG-BB-blink-FR-FG-FB Color-box 5: BC- BR-BG-BB-blink-FR-FG-FB Color-box 6: BC- BR-BG-BB-blink-FR-FG-FB Color-box 7: BC- BR-BG-BB-blink-FR-FG-FB Color-box 8: BC- BR-BG-BB-blink-FR-FG-FB Color-box 1: BC- BR-BG-BB-blink-FR-FG-FB Color-box 2: BC- BR-BG-BB-blink-FR-FG-FB Color-box 3: BC- BR-BG-BB-blink-FR-FG-FB Color-box 4: BC- BR-BG-BB-blink-FR-FG-FB Color-box 5: BC- BR-BG-BB-blink-FR-FG-FB Color-box 6: BC- BR-BG-BB-blink-FR-FG-FB Color-box 7: BC- BR-BG-BB-blink-FR-FG-FB Color-box 8: BC- BR-BG-BB-blink-FR-FG-FB Color-box 1: BC- BR-BG-BB-blink-FR-FG-FB Color-box 2: BC- BR-BG-BB-blink-FR-FG-FB Color-box 3: BC- BR-BG-BB-blink-FR-FG-FB Color-box 4: BC- BR-BG-BB-blink-FR-FG-FB Color-box 5: BC- BR-BG-BB-blink-FR-FG-FB Color-box 6: BC- BR-BG-BB-blink-FR-FG-FB Color-box 7: BC- BR-BG-BB-blink-FR-FG-FB Color-box 8: BC- BR-BG-BB-blink-FR-FG-FB Color-box 1: BC- BR-BG-BB-blink-FR-FG-FB Color-box 2: BC- BR-BG-BB-blink-FR-FG-FB Color-box 3: BC- BR-BG-BB-blink-FR-FG-FB Color-box 4: BC- BR-BG-BB-blink-FR-FG-FB Color-box 5: BC- BR-BG-BB-blink-FR-FG-FB Color-box 6: BC- BR-BG-BB-blink-FR-FG-FB Color-box 7: BC- BR-BG-BB-blink-FR-FG-FB Color-box 8: BC- BR-BG-BB-blink-FR-FG-FB 37/48 Application Hints STV9936P/S 9 9.1 9.1.1 Application Hints Software Hints Programming Recommendations 1. If necessary write a new allocation just before the RAM reset. 2. If necessary write a new allocation at any time but take care of the window display. 3. When resetting the RAM and writing in it just after, write in the RAM respecting the same order as the reset: from the first to the last reset window, from the first window address (row 0, col 0) to the last, incrementing columns, then rows, then windows. 4. Define the window horizontal size prior to writing character and color codes in RAM. HSWI is used to compute the RAM address. 9.1.2 Examples of Programming Hard reset at power-up (following a power-up) 1. Write Window 0 registers to set the OSD parameters: write VCO[1:0], horizontal resolution and vertical height of characters, the position of reference, the allocations if they are incorrect (by default: 320 characters for window 1, 128 characters for each of the others windows) the windows position and size, the color-boxes that will be used. 2. Write the character codes for each window to display. 3. Write the color-box data for each window to display. 4. Write the enable of windows: ENWi = 1 then ENOSD=1. Change of position & size of 1 window (ex. window 3) without disable of window 1. Write new position and sizes. 2. Write new characters in the RAM. Re-allocation, reset, and writing new characters in windows 1. Disable windows. 2. Write new allocations. 3. Reset the windows. 4. Write new positions and sizes in control registers. 5. Write new color-boxes. 6. Write new characters and color codes. 7. Enable windows. 38/48 STV9936P/S Application Hints 9.2 Hardware Hints q The serial resistors on the ROUT, GOUT, BOUT and FBLK outputs must be as close as possible to the device. Both decoupling capacitors (100 nF and 100 F) must be as close as possible to the analog (pin 13) and digital (pin5) power supplies (see Figure 14). PLL network must be close to the device but far from the ROUT, GOUT, BOUT and FBLK outputs. PLL network and ROUT, GOUT, BOUT and FBLK outputs should be separated by the AVDD 3.3 V power trace (see Figure 15 and Figure 16). PLL ground (AGND) should not be connected either to DVSS or to other grounds of the videoboard, as the ground is already connected internally (see Figure 15 and Figure 16). q q q 39/48 Application Diagrams STV9936P/S 10 Application Diagrams Figure 14: STV9936 - Application Diagram SDA R38 100 1 SDA AVSS 16 Rp R46 5.6k C35 10nF SCL R39 100 2 SCL RP 15 R45 15k VS R35 100 3 VS VCO 14 Vc0 R44 5.6k C34 10nF R43 1M HFLY L5 1H 3.3V R41 100 4 HFLY AVDD 13 AVdd L4 1H 3.3V 5 C28 100nF DVDD FBLK 12 C2 100nF C37 100F/25V 6 DVSS BOUT 11 R36 330 C32 100F/25V 7 TEST GOUT 10 R32 330 8 OVDD ROUT 9 R33 330 STV9936 R34 330 40/48 STV9936P/S Figure 15: STV9936 Evaluation Board Application Diagrams Figure 16: STV9936 - Zoom 41/48 Electrical and Timing Characteristics STV9936P/S 11 11.1 Electrical and Timing Characteristics Absolute Maximum Ratings Symbol Parameter DC Supply Voltage Input Voltage for SCL, SDA, VS and HFLY VIN Input Voltage for test TOPER TSTG Ambient Operating Temperature Storage Temperature VDD + 0.5 0, +70 -40, +125 V o o Value -0.5, +4.0 -0.5, 5.5 Unit V V AVDD, DVDD, OVDD C C 11.2 Operating Conditions Parameter DC Supply Voltage AVDD, DVDD, OVDD. Ambient Operating Temperature Symbol VDD TOPER Min. 3.0 0 Typ. 3.3 25 Max. 3.6 70 Unit V oC 11.3 Electrical and Timing Characteristics (VDD = 3.3V, VSS = 0V, TA = 0 to 70o, unless otherwise specified) Symbol Electrical Characteristics IDD VIL VIH Parameter Min. Typ. Max. Unit Analog and Digital Supply Current AIDD+ DIDD + OIDD Input Low Voltage (SCL, SDA, VS, HFLY and TEST pins) Input High Voltage (SCL, SDA, VS and HFLY pins) Test input is connected to ground ROUT, GOUT, BOUT and FBLK Output Low Voltage (IOL = 3 mA) 2.0 30 0.8 5.0 0.4 0.4 2.4 5.0 mA V V V V V V VOL SDA Open Drain Output Low Voltage (IOL = 4 mA) ROUT, GOUT, BOUT and FBLK Output High Voltage (IOH = 3 mA) VOH SDA Open Drain Output High Voltage, pulled up by external 3V to 5V power supply Timing Characteristics Freq (Hline) Horizontal Synchronization Input Range tr tf ROUT, GOUT, BOUT and FBLK Output rise time (C LOAD = 15 pF) ROUT, GOUT, BOUT and FBLK Output fall time (CLOAD = 15 pF) 2 2 150 kHz ns ns 42/48 STV9936P/S Electrical and Timing Characteristics 11.4 IC Bus Characteristics Table 48: Characteristics of the SDA an SCL bus lines for F/S-mode IC-bus devices Standard mode Fast mode Unit Min. Max. Min. Max. Symbol IC Interface: SDA and SCL tSP fSCL tHD;STA tLOW tHIGH tSU; tSTA tHD;DAT tSU;DAT tr tf tSU; tSTO tBUF Cb Parameter Pulse width of spikes which must be suppressed by the input filter SCL clock frequency Hold time (repeated) START Condition. After this period, the first clock pulse is generated LOW period of the SCL clock HIGH period of the SCL clock Set-up time for a repeated START condition Data hold time Data set-up time Rise time of both SCL and SDA signals Fall time of both SCL and SDA signals Set-up time for STOP condition Bus free time between a STOP and a START condition Capacitive load for each bus line n/a 0 4.0 4.7 4.0 4.7 0 250 n/a 100 0 0 0.6 1.3 0.6 0.6 50 400 ns kHz s s s s 3.45 0 100 0.9 s ns 1000 300 4.0 4.7 400 20 + 0.1Cb 20 + 0.1Cb 0.6 1.3 300 300 ns ns s s 400 pF Figure 17: Definition of Timing for F/S-modes handbook, full page width SDA tf tf tLOW tr tSU;DAT tHD;STA tSP tr tBUF SCL tHD;STA tSU;STA tSU;STO S tHD;DAT tHIGH Sr P S 43/48 Package Mechanical Data STV9936P/S 12 12.1 Package Mechanical Data SO16 Narrow Plastic Micropackage Figure 18: SO16 Narrow Plastic Micropackage L a2 C A c1 b e3 e a1 s E D M b1 16 9 F 1 8 Table 49: SO16 Narrow Dimensions mm Dim. Min. A a1 a2 b b1 C c1 D[1] E e e3 F[1] G L M S 3.8 4.6 0.4 9.8 5.8 1.27 8.89 4 5.3 1.27 0.62 8 (max.) 0.150 1.181 0.016 10 6.2 0.35 0.19 0.5 45 (typ.) 0.386 0.228 0.050 0.350 0.157 0.209 0.050 0.024 0.394 0.244 0.1 inches Max. 1.75 0.25 1.6 0.46 0.25 0.014 0.007 0.020 0.004 Typ. Min. Typ. Max. 0.069 0.009 0.063 0.018 0.010 44/48 STV9936P/S Package Mechanical Data 12.2 Dual In-line Plastic Package Figure 19: DIP16 Package a1 I b1 L b Z B e3 e E D 16 9 1 8 Table 50: DIP16 Dimensions mm Dim. Min. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 inches Max. Min. 0.020 0.030 0.020 0.010 0.787 0.065 Typ. Typ. Max. 45/48 Package Mechanical Data D3 3 7 D2 FDH400 11 110/0.25W FDH400 D7 U2 C24 Vcc Vdd GNDA GNDS H2 G1 G2 9 5 7 10 H1 5 6 8 SCL 10 OSD3 C13 100pF J10 3.3V 110V SDA C12 100pF I2C R28 0 1 2 3 4 GND J7 C21 10nF/250V optional 5V TDA9210 L4 1H FBLK RP R47 100 11 SCL FDH400 1 Heater C14 100nF G1 R27 150/0.25W D11 1N4004 C20 4.7nF/1kV R31 GND VS R43 1M C37 100F/25V R35 100 3 VS VCO 14 Vco R44 5.6k C34 10nF HFLY R41 100 4 HFLY AVDD 13 AVdd 4.7nF/2kV C19 F3 1.5 3.3V L5 1H 5 DVDD FBLK 12 C2 100nF C28 100nF 6 DVSS BOUT 11 R36 330 C32 12V 8V 110V J16 C16 47F/25V C15 BLK 3.3V R37 51 ABL C27 47F/25V 3V0 ZD1 C27 47F/25V 47F/25V RadAB20 5V 1 2 3 HS1 7 TEST GOUT 10 30/0.5W 100F/25V R32 330 8 OVDD ROUT 9 R33 330 STV9936 J8 G2 R34 330 J17 G1 HEATER VS HS HFLY Power 7 6 5 4 3 2 1 Sync 1 2 3 4 5 6 7 8 Figure 20: Evaluation Board of the STV955X - TDA9210 - STV9936 STMicroelectronics Monitor Business Unit - Video application CMG - Imaging and Display Division (IDD) 12, rue Jules Horowitz - B.P. 217 38019 Grenoble cedex - FRANCE EVALCRT52/STV955x demoboard (AB25) Version 1.4 Wednesday October 3, 2001 12 GND SCL 2 15 Rp GNDP 46/48 HS C1 110V R29 39 8V 12V 10nF/250V 4.7F/160V 110V R11 2.7 U1 C8 C7 100nF BLK HS/CLP C31 1.5nF R9 1 In1 D10 110V 0.33H 110/0.25W F2 200V R R15 GK F4 200V G B Out1 C23 10pF C33 1.5nF R1 100 BLK C26 R4 2.7 100pF C3 IN1 ABL IN2 VCCP 17 OUT2 16 GNDP C36 1.5nF R17 51 D9 C25 10pF R25 100 C10 C18 100pF ABL 5V D1 100nF 1 20 19 18 51 R6 R7 RK CRT small neck L1 2 C4 100nF 3 OUT1 47F/25V Blue 1N4148 R2 15 5V J1 R3 75 1N4148 D4 Green C9 100nF 4 GNDL C6 100nF 5 IN3 6 GNDA VCCA OSD1 4 In3 110/0.25W D13 Out3 9 OSD2 SCL R40 100 R21 2.7k 12 SDA 13 R22 L3 5V R19 2.7k FDH400 OUT3 14 10pF 1N4148 1 2 3 4 5 6 R13 51 2 In2 110/0.25W 110V 0.33H 110/0.25W D12 FDH400 Out2 10 STV9956 R14 FDH400 L2 R5 75 5V D5 R8 15 D6 1N4148 video C22 100nF R16 2.7 7 8 9 C5 100nF 15 Red 1N4148 R12 15 R10 75 D8 1N4148 U3 R23 SDA R38 100 1 SDA AVSS 16 R46 5.6k C35 10nF BK F1 200V 0.33H 110/0.25W R39 100 R45 15k Rev. C STV9936P/S STV9936P/S Revision History 13 Revision History Table 51: Summary of Modifications Date Version 3.1 3.2 3.3 Description Document upgraded to Datasheet. New presentation. Modification of Section 4.2: Horizontal Resolution. Various edits. Addition of Figure 12: /AC Character Fonts on page 27. Table 46: Control Registers: Window 0, Row = 0 on page 36 changed to previous format. 30 September 2002 19 November 2002 17 January 2003 47/48 STV9936P/S Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. www.st.com 48/48 |
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